AMCC Proprietary 333
Revision 1.02 - September 10, 2007
PPC405 Processor
sync
Synchronize
Preliminary User’s Manual
sync
Synchronize
The sync instruction guarantees that all instructions initiated by the processor preceding sync will complete before
sync completes, and that no subsequent instructions will be initiated by the processor until after sync completes.
When sync completes, all storage accesses that were initiated by the processor before the sync instruction will
have been completed with respect to all mechanisms that access storage.
If instruction bit 31 contains 1, the contents of CR[CR0] are undefined.
Registers Altered
• None.
Invalid Instruction Forms
• Reserved fields
Programming Note
Architecturally, the eieio instruction orders storage access, not instruction completion. Therefore, non-storage
operations that follow eieio could complete before storage operations that precede eieio. The sync instruction
guarantees ordering of instruction completion and storage access. For the PPC405, the eieio instruction is imple-
mented to behave as a sync instruction.
To write code that is portable between various PowerPC implementations, programmers should use the mnemonic
that corresponds to the desired behavior.
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
sync
31
598
0 6 21 31
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