AMCC Proprietary 351
Revision 1.02 - September 10, 2007
PPC405 Processor
xoris
XOR Immediate Shifted
Preliminary User’s Manual
xoris
XOR Immediate Shifted
(RA) ← (RS) ⊕ (IM ||
16
0)
The IM field is extended to 32 bits by concatenating 16 0-bits on the right. The contents of register RS are XORed
with the extended IM field; the result is placed into register RA.
Registers Altered
•RA
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
xoris RA, RS, IM
27 RS RA IM
0 6 11 16 31