AMCC PPC405 - Page 414

AMCC Proprietary 414
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
mtccr0
mtctr
mtdac1
mtdac2
mtdbcr0
mtdbcr1
mtdbsr
mtdccr
mtdear
mtdcwr
mtdvc1
mtdvc2
mtesr
mtevpr
mtiac1
mtiac2
mtiac3
mtiac4
mticcr
mticdbdr
mtlr
mtpid
mtpit
mtpvr
mtsgr
mtsler
mtsprg0
mtsprg1
mtsprg2
mtsprg3
mtsprg4
mtsprg5
mtsprg6
mtsprg7
mtsrr0
mtsrr1
mtsrr2
mtsrr3
mtsu0r
mttcr
mttsr
mtxer
mtzpr
RS Move to SPR SPRN.
Extended mnemonic for
mtspr SPRN,RS
See Table 10-3 on page 354 for listing of valid SPRN values.
272
nop Preferred no-op; triggers optimizations based on no-ops.
Extended mnemonic for
ori 0,0,0
295
not RA, RS Complement register.
(RA)
←¬(RS)
Extended mnemonic for
nor RA,RS,RS
292
not. Extended mnemonic for
nor. RA,RS,RS
CR[CR0]
rotlw RA, RS, RB Rotate left.
(RA)
← ROTL((RS), (RB)
27:31
)
Extended mnemonic for
rlwnm RA,RS,RB,0,31
302
rotlw. Extended mnemonic for
rlwnm. RA,RS,RB,0,31
CR[CR0]
Table B-5. Extended Mnemonics for PPC405 (Continued)
Mnemonic Operands Function
Other Registers
Changed
Page