AMCC PPC405 - Page 442

442 AMCC Confidential and Proprietary
PPC405 Processor
Revision 1.02 - September 10, 2007
Preliminary User’s Manual
twgt 342
twgti 345
twle 342
twlei
345
twlgei 345
twlgt
342
twlgti 345
twlle 342
twllei
345
twllt 342
twllti 345
twlng
342
twlngi 345
twlnl 342
twlnli
345
twlt 343
twlti 345
twne
343
twnei 345
twng 343
twngi
345
twnl 343
twnli 346
extended mnemonics for
tlbre
340
external interrupts
register settings
122
extlwi 301
extlwi. 301
extrwi
301
extrwi. 301
extsb 217
extsb.
217
F
FIT 132
FIT (fixed interval timer)
interrupts, causes
125
interrupts, register settings 126
fixed interval timer. See FIT
G
GPR 353
GPR0-GPR31
35
H, I, J, K
IAC1–IAC4 147
icbi
219
function
76
icbt
220
function
76
iccci 221
function
76
ICCR
107
ICDBDR (Instruction Cache Debug Data Register)
programming note 80
ICDBR
80
icread 222
function
76
programming note 80
inslwi 299
inslwi.
299
insrwi 299
insrwi. 299
instruction
add
161
add. 161
addc
162
addc. 162
addco 162
addco.
162
adde 163
adde. 163
addeo
163
addeo. 163
addi 164
addic
165
addic. 166
addis 167
addme
168
addme. 168
addmeo 168
addmeo.
168
addo 161
addo. 161
addze
169
addze. 169
addzeo 169
addzeo.
169
and
170
and. 170
andc
171
andc.
171
andi. 172
andis.
173
b
174
ba
174
bc
175
bca
175
bcctr
181
bcctrl
181
bcl
175
bcla
175
bclr
184
bclrl
184
bl
174
bla
174
cmp
188
cmpi
189
cmpl
190
cmpli 191
cntlzw
192