Renesas SuperH SH-4A - Page 13

Rev. 1.50, 10/04, page xiii of xx
10.1.2 ADDC (Add with Carry): Arithmetic Instruction................................................ 205
10.1.3 ADDV (Add with (V flag) Overflow Check): Arithmetic Instruction................. 206
10.1.4 AND (AND Logical): Logical Instruction........................................................... 208
10.1.5 BF (Branch if False): Branch Instruction............................................................. 210
10.1.6 BF/S (Branch if False with Delay Slot): Branch Instruction................................ 212
10.1.7 BRA (Branch): Branch Instruction ...................................................................... 214
10.1.8 BRAF (Branch Far): Branch Instruction (Delayed Branch Instruction) .............. 216
10.1.9 BT (Branch if True): Branch Instruction ............................................................. 217
10.1.10 BT/S (Branch if True with Delay Slot): Branch Instruction ................................ 219
10.1.11 CLRMAC (Clear MAC Register): System Control Instruction........................... 221
10.1.12 CLRS (Clear S Bit): System Control Instruction................................................. 222
10.1.13 CLRT (Clear T Bit): System Control Instruction ................................................ 223
10.1.14 CMP/cond (Compare Conditionally): Arithmetic Instruction.............................. 224
10.1.15 DIV0S (Divide (Step 0) as Signed): Arithmetic Instruction ................................ 228
10.1.16 DIV0U (Divide (Step 0) as Unsigned): Arithmetic Instruction ........................... 229
10.1.17 DIV1 (Divide 1 Step): Arithmetic Instruction ..................................................... 230
10.1.18 DMULS.L (Double-length Multiply as Signed): Arithmetic Instruction............. 235
10.1.19 DMULU.L (Double-length Multiply as Unsigned): Arithmetic Instruction........ 237
10.1.20 DT (Decrement and Test): Arithmetic Instruction............................................... 239
10.1.21 EXTS (Extend as Signed): Arithmetic Instruction............................................... 240
10.1.22 EXTU (Extend as Unsigned): Arithmetic Instruction.......................................... 242
10.1.23 ICBI (Instruction Cache Block Invalidate): Data Transfer Instruction ................ 243
10.1.24 JMP (Jump): Branch Instruction.......................................................................... 244
10.1.25 LDC (Load to Control Register): System Control Instruction............................. 245
10.1.26 LDS (Load to System Register): System Control Instruction.............................. 249
10.1.27 LDTLB (Load PTEH/PTEL to TLB): System Control Instruction
(Privileged Instruction) ........................................................................................ 251
10.1.28 MAC.L (Multiply and Accumulate Long): Arithmetic Instruction ..................... 253
10.1.29 MAC.W (Multiply and Accumulate Word): Arithmetic Instruction.................... 257
10.1.30 MOV (Move data): Data Transfer Instruction ..................................................... 260
10.1.31 MOV (Move Constant Value): Data Transfer Instruction ................................... 266
10.1.32 MOV (Move Global Data): Data Transfer Instruction......................................... 269
10.1.33 MOV (Move Structure Data): Data Transfer Instruction..................................... 272
10.1.34 MOVA (Move Effective Address): Data Transfer Instruction ............................275
10.1.35 MOVCA.L (Move with Cache Block Allocation): Data Transfer Instruction..... 276
10.1.36 MOVCO (Move Conditional): Data Transfer Instruction.................................... 277
10.1.37 MOVLI (Move Linked): Data Transfer Instruction............................................. 279
10.1.38 MOVT (Move T Bit): Data Transfer Instruction ................................................. 280
10.1.39 MOVUA (Move Unaligned): Data Transfer Instruction...................................... 281
10.1.40 MUL.L (Multiply Long): Arithmetic Instruction................................................. 283
10.1.41 MULS.W (Multiply as Signed Word): Arithmetic Instruction ............................ 284
10.1.42 MULU.W (Multiply as Unsigned Word): Arithmetic Instruction ....................... 285
10.1.43 NEG (Negate): Arithmetic Instruction................................................................. 286