Renesas SuperH SH-4A

Rev. 1.50, 10/04, page 59 of 448
Functional
Category
No. Instruction
Instruction
Group
Issue Rate
Execution
Cycles
Execution
Pattern
63 CMP/PL Rn EX 1 1 2-1
64 CMP/PZ Rn EX 1 1 2-1
65 CMP/STR Rm,Rn EX 1 1 2-1
66 DIV0S Rm,Rn EX 1 1 2-1
67 DIV0U EX 1 1 2-1
68 DIV1 Rm,Rn EX 1 1 2-1
69 DMULS.L Rm,Rn EX 1 2 5-6
70 DMULU.L Rm,Rn EX 1 2 5-6
71 DT Rn EX 1 1 2-1
72 MAC.L @Rm+,@Rn+ CO 2 5 5-9
73 MAC.W @Rm+,@Rn+ CO 2 4 5-8
74 MUL.L Rm,Rn EX 1 2 5-6
75 MULS.W Rm,Rn EX 1 1 5-5
76 MULU.W Rm,Rn EX 1 1 5-5
77 NEG Rm,Rn EX 1 1 2-1
78 NEGC Rm,Rn EX 1 1 2-1
79 SUB Rm,Rn EX 1 1 2-1
80 SUBC Rm,Rn EX 1 1 2-1
Fixed-point
arithmetic
instructions
81 SUBV Rm,Rn EX 1 1 2-1
82 AND Rm,Rn EX 1 1 2-1
83 AND #imm,R0 EX 1 1 2-1
84 AND.B #imm,@(R0,GBR) CO 3 3 3-2
85 NOT Rm,Rn EX 1 1 2-1
86 OR Rm,Rn EX 1 1 2-1
87 OR #imm,R0 EX 1 1 2-1
88 OR.B #imm,@(R0,GBR) CO 3 3 3-2
89 TAS.B @Rn CO 4 4 3-3
90 TST Rm,Rn EX 1 1 2-1
91 TST #imm,R0 EX 1 1 2-1
92 TST.B #imm,@(R0,GBR) CO 3 3 3-2
93 XOR Rm,Rn EX 1 1 2-1
Logical
instructions
94 XOR #imm,R0 EX 1 1 2-1