Controller area network (bxCAN) UM0306
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Bit 1
SLAK: SLEEP Acknowledge
This bit is set by hardware and indicates to the software that the CAN hardware is
now in SLEEP mode. This bit acknowledges the SLEEP mode request from the
software (set SLEEP bit in CAN_MCR register).
This bit is cleared by hardware when the CAN hardware has left SLEEP mode (to
be synchronized on the CAN bus). To be synchronized the hardware has to
monitor a sequence of 11 consecutive recessive bits on the CAN RX signal.
Note: The process of leaving SLEEP mode is triggered when the SLEEP bit in the
CAN_MCR register is cleared. Please refer to the AWUM bit of the CAN_MCR
register description for detailed information for clearing SLEEP bit
Bit 0
INAK: Initialization Acknowledge
This bit is set by hardware and indicates to the software that the CAN hardware is
now in initialization mode. This bit acknowledges the initialization request from the
software (set INRQ bit in CAN_MCR register).
This bit is cleared by hardware when the CAN hardware has left the initialization
mode (to be synchronized on the CAN bus). To be synchronized the hardware has
to monitor a sequence of 11 consecutive recessive bits on the CAN RX signal.
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