AMCC Proprietary 229
Revision 1.02 - September 10, 2007
PPC405 Processor
lha
Load Halfword Algebraic
Preliminary User’s Manual
0.Instruction Setlha
Load Halfword Algebraic
EA ← (RA|0) + EXTS(D)
(RT)
← EXTS(MS(EA,2))
An effective address (EA) is formed by adding a displacement to a base address. The displacement is obtained by
sign-extending the 16-bit D field to 32 bits. The base address is 0 if the RA field is 0 and is the contents of register
RA otherwise.
The halfword at the EA is sign-extended to 32 bits and placed into register RT.
Registers Altered
•RT
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
l
ha RT, D(RA)
42 RT RA D
0 6 11 16 31
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