AMCC Proprietary 230
Revision 1.02 - September 10, 2007
PPC405 Processor
lhau
Load Halfword Algebraic with Update
Preliminary User’s Manual
lhau
Load Halfword Algebraic with Update
EA ← (RA) + EXTS(D)
(RA)
← EA
(RT)
← EXTS(MS(EA,2))
An effective address (EA) is formed by adding a displacement to the base address in register RA. The displace-
ment is obtained by sign-extending the 16-bit D field to 32 bits. The EA is placed into register RA.
The halfword at the EA is sign-extended to 32 bits and placed into register RT.
Registers Altered
•RA
•RT
Invalid Instruction Forms
•RA=RT
•RA=0
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
lhau RT, D(RA)
43 RT RA D
0 6 11 16 31
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