AMCC Proprietary 238
Revision 1.02 - September 10, 2007
PPC405 Processor
lmw
Load Multiple Word
Preliminary User’s Manual
lmw
Load Multip le Word
EA ← (RA|0) + EXTS(D)
r
← RT
do while r
≤ 31
if ((r ≠ RA) ∨ (r = 31)) then
(GPR(r))
← MS(EA,4)
r
← r+1
EA ← EA + 4
An effective address (EA) is formed by adding a displacement to a base address. The displacement is obtained by
sign-extending the 16-bit D field in the instruction to 32 bits. The base address is 0 if the RA field is 0 and is the
contents of register RA otherwise.
A series of consecutive words starting at the EA are loaded into a set of consecutive GPRs, starting with register
RT and continuing to and including GPR(31). Register RA is not altered by this instruction (unless RA is GPR(31),
which is an invalid form of this instruction). The word which would have been placed into register RA is discarded.
Registers Altered
• RT through GPR(31).
Invalid Instruction Forms
• RA is in the range of registers to be loaded, including the case RA = RT = 0.
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
lmw RT, D(RA)
46 RT RA D
0 6 11 16 31
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