AMCC Proprietary 307
Revision 1.02 - September 10, 2007
PPC405 Processor
srw
Shift Right Word
Preliminary User’s Manual
srw
Shift Right Word
n ← (RB)
27:31
r ← ROTL((RS), 32 – n)
if (RB)
26
= 0 then
m
← MASK(n, 31)
else
m
←
32
0
(RA)
← r ∧ m
The contents of register RS are shifted right by the number of bits specified the contents of register RB
27:31
. Bits
shifted right out of the least significant bit are lost, and 0-bits fill the vacated bit positions on the left. The result is
placed into register RA.
If bit 26 of register RB contains a one, register RA is set to 0.
Registers Altered
•RA
• CR[CR0]
LT, GT, EQ, SO
if Rc contains 1
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
srw RA, RS, RB Rc=0
srw. RA, RS, RB Rc=1
31 RS RA RB 536 Rc
0 6 11 16 21 31
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