AMCC Proprietary 312
Revision 1.02 - September 10, 2007
PPC405 Processor
sth
Store Halfword
Preliminary User’s Manual
25.Instruction Setsth
Store Halfword
EA ← (RA|0) + EXTS(D)
MS(EA, 2)
← (RS)
16:31
An effective address (EA) is formed by adding a displacement to a base address. The displacement is obtained by
sign-extending the 16-bit D field to 32 bits. The base address is 0 when the RA field is 0 and is the contents of
register RA otherwise.
The least significant halfword of register RS is stored into the halfword at the EA in main storage.
Registers Altered
•None
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
sth RS, D(RA)
44 RS RA D
0 6 11 16 31
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