AMCC Proprietary 314
Revision 1.02 - September 10, 2007
PPC405 Processor
sthu
Store Halfword with Update
Preliminary User’s Manual
sthu
Store Halfword with Update
EA ← (RA) + EXTS(D)
MS(EA, 2)
← (RS)
16:31
(RA) ← EA
An effective address (EA) is formed by adding a displacement to the base address in register RA. The displace-
ment is obtained by sign-extending the 16-bit D field to 32 bits. The EA is placed into register RA.
The least significant halfword of register RS is stored into the halfword at the EA.
Registers Altered
•RA
Invalid Instruction Forms
•RA=0
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
sthu RS, D(RA)
45 RS RA D
0 6 11 16 31
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