AMCC PPC405 - Page 377

AMCC Proprietary 377
Revision 1.02 - September 10, 2007
PPC405 Processor
Preliminary User’s Manual
maclhw
RT, RA, RB prod
0:31
← (RA)
16:31
x (RB)
16:31
signed
temp
0:32
← prod
0:31
+ (RT)
(RT)
← temp
1:32
257
maclhw.
CR[CR0]
maclhwo
XER[SO, OV]
maclhwo.
CR[CR0]
XER[SO, OV]
maclhws
RT, RA, RB prod
0:31
← (RA)
16:31
x (RB)
16:31
signed
temp
0:32
← prod
0:31
+ (RT)
if ((prod
0
= RT
0
) ∧ (RT
0
≠ temp
1
)) then
(RT)
← (RT
0
||
31
(¬RT
0
))
else (RT)
← temp
1:32
258
maclhws.
CR[CR0]
maclhwso
XER[SO, OV]
maclhwso.
CR[CR0]
XER[SO, OV]
maclhwsu
RT, RA, RB prod
0:31
← (RA)
16:31
x (RB)
16:31
unsigned
temp
0:32
← prod
0:31
+ (RT)
(RT)
← (temp
1:32
∨
32
temp
0
)
259
maclhwsu.
CR[CR0]
maclhwsuo
XER[SO, OV]
maclhwsuo.
CR[CR0]
XER[SO, OV]
maclhwu
RT, RA, RB prod
0:31
← (RA)
16:31
x (RB)
16:31
unsigned
temp
0:32
← prod
0:31
+ (RT)
(RT) ← temp
1:32
260
maclhwu.
CR[CR0]
maclhwuo
XER[SO, OV]
maclhwuo.
CR[CR0]
XER[SO, OV]
mcrf BF, BFA Move CR field, (CR[CRn]) ← (CR[CRm])
where m ← BFA and n ← BF.
261
mcrxr BF Move XER[0:3] into field CRn, where n←BF.
CR[CRn] ← (XER[SO, OV, CA]).
(XER[SO, OV, CA]) ←
3
0.
262
mfcr RT Move from CR to RT,
(RT) ← (CR).
263
mfdcr RT, DCRN Move from DCR to RT,
(RT) ← (DCR(DCRN)).
264
mfmsr RT Move from MSR to RT,
(RT) ← (MSR).
265
Table A-1. PPC405 Instruction Syntax Summary (Continued)
Mnemonic Operands Function Other Registers Changed Page