Fuji Xerox Phaser 5500

Wiring Diagrams 10-31
Engine Logic and Image Processor Board Interface
I/P BoardEngine
Logic Board
P/J402
1
2
3
4
5
6
7
8
P/J301
18
17
16
15
14
13
12
11
SG
Command (I/P To Engine)
Status (Engine To I/P)
SG
Command Ready
9
10
11
12
13
14
15
16
17
18
9
8
7
6
5
4
3
2
1
10
SG
Status Ready
SClock
FWE
TOP
BD
Start
PRED
Engine Ready
I/P Ready
Ready
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