NXP Semiconductors LPC1311 - Iocon_Pio2_3; Iocon_Swdio_Pio1_3; Reserved

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User manual Rev. 3 — 14 June 2011 110 of 368
NXP Semiconductors
UM10375
Chapter 7: LPC13xx I/O configuration
7.4.34 IOCON_PIO2_3
7.4.35 IOCON_SWDIO_PIO1_3
10 OD Selects pseudo open-drain mode. 0
0 Standard GPIO output
1 Open-drain output
31:11 - - Reserved -
Table 129. IOCON_PIO3_1 register (IOCON_PIO3_1, address 0x4004 4088) bit description
Bit Symbol Value Description Reset
value
Table 130. IOCON_PIO2_3 register (IOCON_PIO2_3, address 0x4004 408C) bit description
Bit Symbol Value Description Reset
value
2:0 FUNC Selects pin function. All other values are reserved. 000
0x0 Selects function PIO2_3.
0x1 Selects function RI
.
0x2 Selects function MOSI1 (function not available on all parts).
4:3 MODE Selects function mode (on-chip pull-up/pull-down resistor
control)
10
0x0 Inactive (no pull-down/pull-up resistor enabled)
0x1 Pull-down resistor enabled
0x2 Pull-up resistor enabled
0x3 Repeater mode
5 HYS Hysteresis 0
0 Disable
1 Enable
9:6 - - Reserved 0011
10 OD Selects pseudo open-drain mode. 0
0 Standard GPIO output
1 Open-drain output
31:11 - - Reserved -
Table 131. IOCON_SWDIO_PIO1_3 register (IOCON_SWDIO_PIO1_3, address 0x4004 4090)
bit description
Bit Symbol Value Description Reset
value
2:0 FUNC Selects pin function. All other values are reserved. 000
0x0 Selects function SWDIO.
0x1 Selects function PIO1_3.
0x2 Selects function AD4.
0x3 Selects function CT32B1_MAT2.