UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 180 of 368
12.1 How to read this chapter
The UART block is identical for all LPC13xx parts. The DSR, DCD, and RI modem signals
are pinned out for the LQFP48 packages only.
12.2 Basic configuration
The UART is configured using the following registers:
1. Pins: For the LPC1311/13/42/43 parts, the UART pins must be configured in the
IOCONFIG register block (Section 7.4
) before the UART clocks can be enabled. For
the LPC1311/01 and LPC1313/01 parts, no special enabling sequence is required.
Remark: For the LPC1311/01 and LPC1313/01 parts, the modem functions on pins
PIO3_1 to PIO3_3 must be configured in the corresponding IOCONFIG registers and
also in the IOCON_DSR_LOC, IOCON_DCD_LOC, and IOCON_RI_LOC registers
(see Table 140
to Table 101).
2. Power: In the SYSAHBCLKCTRL register, set bit 12 (Table 25
).
3. Peripheral clock: Enable the UART peripheral clock by writing to the UARTCLKDIV
register (Table 27
).
12.3 Features
• 16-byte receive and transmit FIFOs.
• Register locations conform to ‘550 industry standard.
• Receiver FIFO trigger points at 1, 4, 8, and 14 bytes.
• Built-in baud rate generator.
• UART allows for implementation of either software or hardware flow control.
• RS-485/EIA-485 9-bit mode support with output enable.
• Modem control.
12.4 Pin description
UM10375
Chapter 12: LPC13xx UART
Rev. 3 — 14 June 2011 User manual
Table 192. UART pin description
Pin Type Description
RXD Input Serial Input. Serial receive data.
TXD Output Serial Output. Serial transmit data.
RTS
Output Request To Send. RS-485 direction control pin.
DTR
Output Data Terminal Ready.
DSR
[1]
Input Data Set Ready.
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