NXP Semiconductors LPC1311 User Manual

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User manual Rev. 3 — 14 June 2011 71 of 368
NXP Semiconductors
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Chapter 6: LPC13xx Interrupt controller
6.6.6 Interrupt Set-Pending Register 1 register
The ISPR1 register allows setting the pending state of the second group of peripheral
interrupts, or for reading the pending state of those interrupts. Clearing the pending state
of interrupts is done through the ICPR0 and ICPR1 registers (Section 6.6.7
and
Section 6.6.8
).
The bit description is as follows for all bits in this register:
Write — Writing 0 has no effect, writing 1 changes the interrupt state to pending.
Read — 0 indicates that the interrupt is not pending, 1 indicates that the interrupt is
pending.
5 ISP_PIO0_5 PIO0_5 start logic input interrupt pending set.
6 ISP_PIO0_6 PIO0_6 start logic input interrupt pending set.
7 ISP_PIO0_7 PIO0_7 start logic input interrupt pending set.
8 ISP_PIO0_8 PIO0_8 start logic input interrupt pending set.
9 ISP_PIO0_9 PIO0_9 start logic input interrupt pending set.
10 ISP_PIO0_10 PIO0_10 start logic input interrupt pending set.
11 ISP_PIO0_11 PIO0_11 start logic input interrupt pending set.
12 ISP_PIO1_0 PIO1_0 start logic input interrupt pending set.
13 ISP_PIO1_1 PIO1_1 start logic input interrupt pending set.
14 ISP_PIO1_2 PIO1_2 start logic input interrupt pending set.
15 ISP_PIO1_3 PIO1_3 start logic input interrupt pending set.
16 ISP_PIO1_4 PIO1_4 start logic input interrupt pending set.
17 ISP_PIO1_5 PIO1_5 start logic input interrupt pending set.
18 ISP_PIO1_6 PIO1_6 start logic input interrupt pending set.
19 ISP_PIO1_7 PIO1_7 start logic input interrupt pending set.
20 ISP_PIO1_8 PIO1_8 start logic input interrupt pending set.
21 ISP_PIO1_9 PIO1_9 start logic input interrupt pending set.
22 ISP_PIO1_10 PIO1_10 start logic input interrupt pending set.
23 ISP_PIO1_11 PIO1_11 start logic input interrupt pending set.
24 ISP_PIO2_0 PIO2_0 start logic input interrupt pending set.
25 ISP_PIO2_1 PIO2_1 start logic input interrupt pending set.
26 ISP_PIO2_2 PIO2_2 start logic input interrupt pending set.
27 ISP_PIO2_3 PIO2_3 start logic input interrupt pending set.
28 ISP_PIO2_4 PIO2_4 start logic input interrupt pending set.
29 ISP_PIO2_5 PIO2_5 start logic input interrupt pending set.
30 ISP_PIO2_6 PIO2_6 start logic input interrupt pending set.
31 ISP_PIO2_7 PIO2_7 start logic input interrupt pending set.
Table 72. Interrupt Set-Pending Register 0 register (ISPR0 - address 0xE000 E200) bit
description
…continued
Bit Symbol Description

NXP Semiconductors LPC1311 Specifications

General

Brand	NXP Semiconductors
Model	LPC1311
Category	Controller
Language	English