EasyManuals Logo

NXP Semiconductors LPC1311 User Manual

NXP Semiconductors LPC1311
368 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #35 background imageLoading...
Page #35 background image
UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 35 of 368
NXP Semiconductors
UM10375
Chapter 3: LPC13xx System configuration
3.5.39 Start logic reset register 0
Writing a one to a bit in the STARTRSRP0CLR register resets the start logic state. The bit
assignment is identical to Table 44
. The start-up logic uses the input signals to generate a
clock edge for registering a start signal. This clock edge (falling or rising) sets the interrupt
for waking up from Deep-sleep mode. Therefore, the start-up logic states must be cleared
before being used.
3.5.40 Start logic status register 0
This register reflects the status of the enabled start signal bits. The bit assignment is
identical to Table 44
. Each bit (if enabled) reflects the state of the start logic, i.e. whether
or not a wake-up signal has been received for a given pin.
3.5.41 Start logic edge control register 1
The STARTAPRP1 register controls the start logic inputs of ports 2 (PIO2_8 to PIO2_11)
and 3 (PIO3_0 to PIO3_3). This register selects a falling or rising edge on the
corresponding PIO input to produce a falling or rising clock edge, respectively, for the
start-up logic.
Table 46. Start logic reset register 0 (STARTRSRP0CLR, address 0x4004 8208) bit
description
Bit Symbol Description Reset
value
11:0 RSRPIO0_n Start signal reset for start logic input PIO0_n (bit 0 = PIO0_0, ...,
bit 11 = PIO0_11).
0 = Do nothing.
1 = Write: reset start signal.
0
23:12 RSRPIO1_n Start signal reset for start logic input PIO1_n (bit 12 = PIO1_0, ...,
bit 23 = PIO1_11).
0 = Do nothing.
1 = Write: reset start signal.
0
31:24 RSRPIO2_n Start signal reset for start logic input PIO2_n (bit 24 = PIO2_0, ...,
bit 31 = PIO2_7).
0 = Do nothing.
1 = Write: reset start signal.
0
Table 47. Start logic status register 0 (STARTSRP0, address 0x4004 820C) bit description
Bit Symbol Description Reset
value
11:0 SRPIO0_n Start signal status for start logic input PIO0_n (bit 0 = PIO0_0, ...,
bit 11 = PIO0_11).
0 = No start signal received.
1 = Start signal pending.
0
23:12 SRPIO1_n Start signal status for start logic input PIO1_n (bit 12 = PIO1_0, ...,
bit 23 = PIO1_11).
0 = No start signal received.
1 = Start signal pending.
0
31:24 SRPIO2_n Start signal status for start logic input PIO2_n (bit 24 = PIO2_0, ...,
bit 31 = PIO2_7).
0 = No start signal received.
1 = Start signal pending.
0

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the NXP Semiconductors LPC1311 and is the answer not in the manual?

NXP Semiconductors LPC1311 Specifications

General IconGeneral
BrandNXP Semiconductors
ModelLPC1311
CategoryController
LanguageEnglish

Related product manuals