UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 312 of 368
20.1 How to read this chapter
The ADC block is identical for all LPC13xx parts.
20.2 Basic configuration
The ADC is configured using the following registers:
1. Pins: The ADC pin functions are configured in the IOCONFIG register block
(Section 7.4
).
2. Power and peripheral clock: In the SYSAHBCLKCTRL register, set bit 13 (Table 25
).
Power to the ADC at run-time is controlled through the PDRUNCFG register
(Table 55
).
20.3 Features
• 10-bit successive approximation Analog-to-Digital Converter (ADC).
• Input multiplexing among 8 pins.
• Power-down mode.
• Measurement range 0 to 3.6 V. Do not exceed the V
DD
voltage level.
• 10-bit conversion time 2.44 s.
• Burst conversion mode for single or multiple inputs.
• Optional conversion on transition on input pin or Timer Match signal.
• Individual result registers for each A/D channel to reduce interrupt overhead.
20.4 Pin description
Table 303 gives a brief summary of the ADC related pins.
The ADC function must be selected via the IOCON registers in order to get accurate
voltage readings on the monitored pin. For a pin hosting an ADC input, it is not possible to
have a have a digital function selected and yet get valid ADC readings. An inside circuit
disconnects ADC hardware from the associated pin whenever a digital function is selected
on that pin.
UM10375
Chapter 20: LPC13xx Analog-to-Digital Converter (ADC)
Rev. 3 — 14 June 2011 User manual
Table 303. ADC pin description
Pin Type Description
AD[7:0] Input Analog Inputs. The A/D converter cell can measure the voltage on any
of these input signals.
Remark: While the pins are 5 V tolerant in digital mode, the maximum
input voltage must not exceed V
DD
when the pins are configured as
analog inputs.
V
DD
Input V
REF
; Reference voltage.
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