UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 361 of 368
NXP Semiconductors
UM10375
Chapter 23: LPC13xx Supplementary information
3.10.3 Using the general purpose counter/timers to
create a self-wake-up event . . . . . . . . . . . . . . 47
3.11 PLL (System PLL and USB PLL) functional
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.11.1 Lock detector . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.11.2 Power-down control . . . . . . . . . . . . . . . . . . . . 49
3.11.3 Divider ratio programming . . . . . . . . . . . . . . . 49
Post divider . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Feedback divider . . . . . . . . . . . . . . . . . . . . . . . 49
Changing the divider values. . . . . . . . . . . . . . . 49
3.11.4 Frequency selection. . . . . . . . . . . . . . . . . . . . 49
3.11.4.1 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.11.4.2 Power-down mode. . . . . . . . . . . . . . . . . . . . . 50
3.12 Flash memory access. . . . . . . . . . . . . . . . . . . 51
Chapter 4: LPC13xx Power Management Unit (PMU)
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
4.2 Register description . . . . . . . . . . . . . . . . . . . . 52
4.2.1 Power control register. . . . . . . . . . . . . . . . . . . 52
4.2.2 General purpose registers 0 to 3 . . . . . . . . . 53
4.2.3 General purpose register 4 . . . . . . . . . . . . . . 53
4.3 Functional description . . . . . . . . . . . . . . . . . . 53
Chapter 5: LPC13xx Power profiles
5.1 How to read this chapter. . . . . . . . . . . . . . . . . 54
5.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
5.3 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
5.4 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.5 Clocking routine . . . . . . . . . . . . . . . . . . . . . . . 55
5.5.1 set_pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
5.5.1.1 Param0: system PLL input frequency and
Param1: expected system clock. . . . . . . . . . . 56
5.5.1.2 Param2: mode . . . . . . . . . . . . . . . . . . . . . . . . 56
5.5.1.3 Param3: system PLL lock time-out. . . . . . . . . 57
5.5.1.4 Code examples. . . . . . . . . . . . . . . . . . . . . . . . 57
5.5.1.4.1 Invalid frequency (device maximum clock rate
exceeded). . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.5.1.4.2 Invalid frequency selection (system clock divider
restrictions). . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.5.1.4.3 Exact solution cannot be found (PLL). . . . . . . 58
5.5.1.4.4 System clock less than or equal to the expected
value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.5.1.4.5 System clock greater than or equal to the
expected value. . . . . . . . . . . . . . . . . . . . . . . . 58
5.5.1.4.6 System clock approximately equal to the expected
value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.6 Power routine . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.6.1 set_power . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5.6.1.1 Param0: main clock . . . . . . . . . . . . . . . . . . . . 60
5.6.1.2 Param1: mode . . . . . . . . . . . . . . . . . . . . . . . . 60
5.6.1.3 Param2: system clock . . . . . . . . . . . . . . . . . . 60
5.6.1.4 Code examples . . . . . . . . . . . . . . . . . . . . . . . 61
5.6.1.4.1 Invalid frequency (device maximum clock rate
exceeded) . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.6.1.4.2 An applicable power setup. . . . . . . . . . . . . . . 61
Chapter 6: LPC13xx Interrupt controller
6.1 How to read this chapter. . . . . . . . . . . . . . . . . 62
6.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
6.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
6.4 Interrupt sources . . . . . . . . . . . . . . . . . . . . . . . 62
6.5 Vector table remapping . . . . . . . . . . . . . . . . . . 64
Example:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64
6.6 Register description . . . . . . . . . . . . . . . . . . . . 65
6.6.1 . . . . Interrupt Set-Enable Register 0 register 66
6.6.2 . . . . . . . . . . . Interrupt Set-Enable Register 1 67
6.6.3 Interrupt Clear-Enable Register 0. . . . . . . . . . 68
6.6.4 . . .Interrupt Clear-Enable Register 1 register 69
6.6.5 . . . . Interrupt Set-Pending Register 0 register 70
6.6.6 . . . . Interrupt Set-Pending Register 1 register 71
6.6.7 . .Interrupt Clear-Pending Register 0 register 72
6.6.8 . . Interrupt Clear-Pending Register 1 register 74
6.6.9 Interrupt Active Bit Register 0. . . . . . . . . . . . . 75
6.6.10 Interrupt Active Bit Register 1 . . . . . . . . . . . . 76
6.6.11 Interrupt Priority Register 0 . . . . . . . . . . . . . . 77
6.6.12 Interrupt Priority Register 1 . . . . . . . . . . . . . . 77
6.6.13 Interrupt Priority Register 2 . . . . . . . . . . . . . . 78
6.6.14 Interrupt Priority Register 3 . . . . . . . . . . . . . . 78
6.6.15 Interrupt Priority Register 4 . . . . . . . . . . . . . . 79
6.6.16 Interrupt Priority Register 5 . . . . . . . . . . . . . . 79
6.6.17 Interrupt Priority Register 6 . . . . . . . . . . . . . . 80
6.6.18 Interrupt Priority Register 7 . . . . . . . . . . . . . . 80
6.6.19 Interrupt Priority Register 8 . . . . . . . . . . . . . . 81
6.6.20 Interrupt Priority Register 9 . . . . . . . . . . . . . . 81
6.6.21 Interrupt Priority Register 10 . . . . . . . . . . . . . 82
6.6.22 Interrupt Priority Register 11 . . . . . . . . . . . . . 82
6.6.23 Interrupt Priority Register 12 . . . . . . . . . . . . . 83
6.6.24 Interrupt Priority Register 13 . . . . . . . . . . . . . 83
6.6.25 Interrupt Priority Register 14 . . . . . . . . . . . . . 84
6.6.26 Software Trigger Interrupt Register . . . . . . . . 84
Chapter 7: LPC13xx I/O configuration
7.1 How to read this chapter. . . . . . . . . . . . . . . . . 85
7.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
7.3 General description. . . . . . . . . . . . . . . . . . . . . 86
7.3.1 Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . 86
7.3.2 Pin mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
7.3.3 Hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . 87