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User manual Rev. 3 — 14 June 2011 33 of 368
NXP Semiconductors
UM10375
Chapter 3: LPC13xx System configuration
3.5.35 BOD control register
The BOD control register selects four separate threshold values for sending a BOD
interrupt to the NVIC. Only one level is allowed for forced reset.
3.5.36 System tick counter calibration register
This register determines the value of the SYST_CALIB register (see Table 288).
Table 42. BOD control register (BODCTRL, address 0x4004 8150) bit description
Bit Symbol Value Description Reset
value
1:0 BODRSTLEV BOD reset level. Trip values x/y refer to the
LPC1300/LPC1300L series.
0
0x0 The reset assertion threshold voltage is 1.49 V/1.46 V;
the reset de-assertion threshold voltage is 1.64 V/1.63
V.
0x1 The reset assertion threshold voltage is -/2.06 V; the
reset de-assertion threshold voltage is -/2.15 V.
0x2 The reset assertion threshold voltage is -/2.35 V; the
reset de-assertion threshold voltage is -/2.43 V.
0x3 The reset assertion threshold voltage is -/2.63 V; the
reset de-assertion threshold voltage is -/2.71 V.
3:2 BODINTVAL BOD interrupt level. Trip values x/y refer to the
LPC1300/LPC1300L series.
0
0x0 The interrupt assertion threshold voltage is 1.69
V/1.65 V; the interrupt de-assertion threshold voltage is
1.84 V/1.8 V.
0x1 The interrupt assertion threshold voltage is
2.29 V/2.22 V; the interrupt de-assertion threshold
voltage is 2.44 V/2.35 V.
0x2 The interrupt assertion threshold voltage is 2.59 V/
2.52 V; the interrupt de-assertion threshold voltage is
2.74 V/2.66 V.
0x3 The interrupt assertion threshold voltage is
2.87 V/2.80 V; the interrupt de-assertion threshold
voltage is 2.98 V/2.90 V.
4 BODRSTENA BOD reset enable 0
0 Disable reset function.
1 Enable reset function.
31:5 - - Reserved 0
Table 43. System tick timer calibration register (SYSTCKCAL, address 0x4004 8154) bit
description
Bit Symbol Description Reset value
25:0 CAL System tick timer calibration value 0x04
31:26 - Reserved 0x00