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NXP Semiconductors LPC1311 User Manual

NXP Semiconductors LPC1311
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UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 284 of 368
NXP Semiconductors
UM10375
Chapter 16: LPC13xx 32-bit timer/counters (CT32B0/1)
16.8.2 Timer Control Register (TMR32B0TCR and TMR32B1TCR)
The Timer Control Register (TCR) is used to control the operation of the counter/timer.
16.8.3 Timer Counter (TMR32B0TC - address 0x4001 4008 and
TMR32B1TC - address 0x4001 8008)
The 32-bit Timer Counter is incremented when the Prescale Counter reaches its terminal
count. Unless it is reset before reaching its upper limit, the TC will count up through the
value 0xFFFF FFFF and then wrap back to the value 0x0000 0000. This event does not
cause an interrupt, but a Match register can be used to detect an overflow if needed.
16.8.4 Prescale Register (TMR32B0PR - address 0x4001 400C and
TMR32B1PR - address 0x4001 800C)
The 32-bit Prescale Register specifies the maximum value for the Prescale Counter.
Table 271: Interrupt Register (TMR32B0IR - address 0x4001 4000 and TMR32B1IR - address 0x4001 8000) bit
description
Bit Symbol Description Reset value
0 MR0INT Interrupt flag for match channel 0. 0
1 MR1INT Interrupt flag for match channel 1. 0
2 MR2INT Interrupt flag for match channel 2. 0
3 MR3INT Interrupt flag for match channel 3. 0
4 CR0INT Interrupt flag for capture channel 0 event. 0
31:5 - Reserved -
Table 272: Timer Control Register (TMR32B0TCR - address 0x4001 4004 and TMR32B1TCR -
address 0x4001 8004) bit description
Bit Symbol Description Reset value
0 CEN When one, the Timer Counter and Prescale Counter are
enabled for counting. When zero, the counters are
disabled.
0
1 CRES When one, the Timer Counter and the Prescale Counter
are synchronously reset on the next positive edge of
PCLK. The counters remain reset until TCR[1] is
returned to zero.
0
31:2 - Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
NA
Table 273: Timer counter registers (TMR32B0TC, address 0x4001 4008 and TMR32B1TC
0x4001 8008) bit description
Bit Symbol Description Reset
value
31:0 TC Timer counter value. 0

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NXP Semiconductors LPC1311 Specifications

General IconGeneral
BrandNXP Semiconductors
ModelLPC1311
CategoryController
LanguageEnglish

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