EasyManuals Logo

NXP Semiconductors LPC1311 User Manual

NXP Semiconductors LPC1311
368 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #319 background imageLoading...
Page #319 background image
UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 319 of 368
NXP Semiconductors
UM10375
Chapter 21: LPC13xx Flash memory programming firmware
21.2.1 Bootloader code version 5.2 notes
In bootloader version 5.2 (LPC134x parts), the mass storage device state machine uses
an uninitialized variable. This has two consequences:
1. In the user code, the memory location must be initialized as follows to create a
work-around for this issue:
*((unit32_t *)(0x1000 0054)) = 0x0;
2. If the USB ISP mode is entered on power-up (see Section 21.3), the memory is not
initialized, and no user code is executed which could write to this memory location.
Therefore the device times out when first connected to the Windows operating
system, and the MSD disk only appears after a time-out and retry, which takes 45 sec
or longer. A work-around for the time-out issue is not available.
21.3 Features
• In-System Programming: In-System programming (ISP) is programming or
reprogramming the on-chip flash memory, using the bootloader software and UART
serial port or the USB interface. This can be done when the part resides in the
end-user board.
• In Application Programming: In-Application (IAP) programming is performing erase
and write operation on the on-chip flash memory, as directed by the end-user
application code.
• The LPC134x supports ISP from the USB port through enumeration as a Mass
Storage Class (MSC) Device when connected to a USB host interface (Windows
operating system only).
• Flash access times can be configured through a register in the flash controller block.
• Erase time for one sector is 100 ms  5%. Programming time for one block of
256 bytes is 1 ms  5%.
21.4 Description
The bootloader code is executed every time the part is powered on or reset (see
Figure 63
). The loader can either execute the ISP command handler or the user
application code, or it can obtain the boot image as an attached MSC device through
USB. A LOW level during reset at the PIO0_1 pin is considered an external hardware
request to start the ISP command handler or the USB device enumeration without
checking for a valid user code first. The state of PIO0_3 determines whether the UART or
USB interface will be used:
• If PIO0_3 is sampled HIGH, the bootloader connects the LPC134x as a MSC USB
device to a PC host. The LPC134x flash memory space is represented as a drive in
the host’s Windows operating system.
• If PIO0_3 is sampled LOW, the bootloader configures the UART serial port and calls
the ISP command handler.
Remark: On the LPC131x parts (no USB), the state of pin PIO0_3 does not matter.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the NXP Semiconductors LPC1311 and is the answer not in the manual?

NXP Semiconductors LPC1311 Specifications

General IconGeneral
BrandNXP Semiconductors
ModelLPC1311
CategoryController
LanguageEnglish

Related product manuals