NXP Semiconductors LPC1311 User Manual

UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 129 of 368
NXP Semiconductors
UM10375
Chapter 8: LPC13xx Pin configuration
[1] Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (for V
DD
= 3.3 V, pin is pulled up to 2.6 V for
parts LPC1311/13/42/43 and pulled up to 3.3 V for parts LPC1311/01 and LPC1313/01); IA = inactive, no pull-up/down enabled.
F = floating; floating pins, if not used, should be tied to ground or power to minimize power consumption.
[2] 5 V tolerant pad. See LPC13xx data sheet for pad characteristics. RESET
functionality is not available in Deep power-down mode. Use
the WAKEUP pin to reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for the
Deep power-down mode.
[3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 9
).
[4] I
2
C-bus pads compliant with the I
2
C-bus specification for I
2
C standard mode and I
2
C Fast-mode Plus.
[5] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled, and the pin is not 5 V tolerant (see Figure 9
).
[6] Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode
only). This pad is not 5 V tolerant.
[7] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
PIO1_7/TXD/
CT32B0_MAT1
32
[3]
yes I/O I; PU PIO1_7 — General purpose digital input/output pin.
O- TXD — Transmitter output for UART.
O- CT32B0_MAT1 — Match output 1 for 32-bit timer 0.
PIO1_8/
CT16B1_CAP0
7
[3]
yes I/O I; PU PIO1_8 — General purpose digital input/output pin.
I- CT16B1_CAP0 — Capture input 0 for 16-bit timer 1.
PIO1_9/
CT16B1_MAT0
12
[3]
yes I/O I; PU PIO1_9 — General purpose digital input/output pin.
O- CT16B1_MAT0 — Match output 0 for 16-bit timer 1.
PIO1_10/AD6/
CT16B1_MAT1
20
[5]
yes I/O I; PU PIO1_10 — General purpose digital input/output pin.
I- AD6 — A/D converter, input 6.
O- CT16B1_MAT1 — Match output 1 for 16-bit timer 1.
PIO1_11/AD7 27
[5]
yes I/O I; PU PIO1_11 — General purpose digital input/output pin.
I- AD7 — A/D converter, input 7.
PIO2_0/DTR
1
[3]
yes I/O I; PU PIO2_0 — General purpose digital input/output pin.
O- DTR
— Data Terminal Ready output for UART.
PIO3_2 28
[3]
yes I/O I; PU PIO3_2 — General purpose digital input/output pin.
PIO3_4 13
[3]
no I/O I; PU PIO3_4 — General purpose digital input/output pin (LPC1311/13 only).
PIO3_5 14
[3]
no I/O I; PU PIO3_5 — General purpose digital input/output pin (LPC1311/13 only).
USB_DM 13
[6]
no I/O F USB_DM — USB bidirectional D line (LPC1342/43 only).
USB_DP 14
[6]
no I/O F USB_DP — USB bidirectional D+ line (LPC1342/43 only).
V
DD
6;
29
- I - 3.3 V supply voltage to the internal regulator, the external rail, and the
ADC. Also used as the ADC reference voltage.
XTALIN 4
[7]
- I - Input to the oscillator circuit and internal clock generator circuits. Input
voltage must not exceed 1.8 V.
XTALOUT 5
[7]
- O - Output from the oscillator amplifier.
V
SS
33 - - - Thermal pad. Connect to ground.
Table 145. LPC1311/13/42/43 HVQFN33 pin description table
…continued
Symbol Pin Start
logic
input
Type Reset
state
[1]
Description

NXP Semiconductors LPC1311 Specifications

General

Brand	NXP Semiconductors
Model	LPC1311
Category	Controller
Language	English