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NXP Semiconductors LPC1311 User Manual

NXP Semiconductors LPC1311
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UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 76 of 368
NXP Semiconductors
UM10375
Chapter 6: LPC13xx Interrupt controller
6.6.10 Interrupt Active Bit Register 1
The IABR1 register is a read-only register that allows reading the active state of the
second group of peripheral interrupts. This allows determining which peripherals are
asserting an interrupt to the NVIC, and may also be pending if there are enabled.
The bit description is as follows for all bits in this register:
Write — n/a.
Read — 0 indicates that the interrupt is not active, 1 indicates that the interrupt is active.
Table 77. Interrupt Active Bit Register 1 (IABR1 - address 0xE000 E304) bit description
Bit Symbol Description
0 IAB_PIO2_8 PIO0_0 start logic input interrupt active.
1 IAB_PIO2_9 PIO2_9 start logic input interrupt active.
2 IAB_PIO2_10 PIO2_10 start logic input interrupt active.
3 IAB_PIO2_11 PIO2_11 start logic input interrupt active.
4 IAB_PIO3_0 PIO3_0 start logic input interrupt active.
5 IAB_PIO3_1 PIO3_0 start logic input interrupt active.
6 IAB_PIO3_2 PIO3_0 start logic input interrupt active.
7 IAB_PIO3_3 PIO3_0 start logic input interrupt active.
8 IAB_I2C0 I
2
C0 interrupt active.
9 IAB_CT16B0 Timer CT16B0 interrupt active.
10 IAB_CT16B1 Timer CT16B1 interrupt active.
11 IAB_CT32B0 Timer CT32B0 interrupt active.
12 IAB_CT32B1 Timer CT32B1 interrupt active.
13 IAB_SSP0 SSP0 interrupt active.
14 IAB_UART UART interrupt active.
15 IAB_USBIRQ USB IRQ interrupt active.
16 IAB_USBFRQ USB FRQ interrupt active.
17 IAB_ADC ADC interrupt active.
18 IAB_WDT WDT interrupt active.
19 IAB_BOD BOD interrupt active.
20 - Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
21 IAB_PIO_3 GPIO port 3 interrupt active.
22 IAB_PIO_2 GPIO port 2 interrupt active.
23 IAB_PIO_1 GPIO port 1 interrupt active.
24 IAB_PIO_0 GPIO port 0 interrupt active.
25 IAB_SSP1 SSP1 interrupt active.
31:26 - Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.

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NXP Semiconductors LPC1311 Specifications

General IconGeneral
BrandNXP Semiconductors
ModelLPC1311
CategoryController
LanguageEnglish

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