NXP Semiconductors LPC1311 User Manual

UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 126 of 368
NXP Semiconductors
UM10375
Chapter 8: LPC13xx Pin configuration
[1] Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (for V
DD
= 3.3 V, pin is pulled up to 2.6 V for
parts LPC1311/13/42/43 and pulled up to 3.3 V for parts LPC1311/01 and LPC1313/01); IA = inactive, no pull-up/down enabled;
F = floating; floating pins, if not used, should be tied to ground or power to minimize power consumption.
[2] 5 V tolerant pad. See the LPC13xx data sheet for pad characteristics. RESET
functionality is not available in Deep power-down mode.
Use the WAKEUP pin to reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for
the Deep power-down mode.
[3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 9
).
[4] I
2
C-bus pads compliant with the I
2
C-bus specification for I
2
C standard mode and I
2
C Fast-mode Plus.
[5] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 9
).
[6] Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode
only). This pad is not 5 V tolerant.
[7] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
PIO2_11/SCK0 31
[3]
yes I/O I; PU PIO2_11 — General purpose digital input/output pin.
I/O - SCK0 — Serial clock for SSP0.
PIO3_0/DTR
36
[3]
yes I/O I; PU PIO3_0 — General purpose digital input/output pin.
O- DTR
— Data Terminal Ready output for UART (LPC1311/01 and
LPC1313/01 only).
PIO3_1/DSR
37
[3]
yes I/O I; PU PIO3_1 — General purpose digital input/output pin.
I- DSR
— Data Set Ready input for UART (LPC1311/01 and
LPC1313/01 only).
PIO3_2/DCD
43
[3]
yes I/O I; PU PIO3_2 — General purpose digital input/output pin.
I- DCD
— Data Carrier Detect input for UART (LPC1311/01 and
LPC1313/01 only).
PIO3_3/RI
48
[3]
yes I/O I; PU PIO3_3 — General purpose digital input/output pin.
I- RI
— Ring Indicator input for UART (LPC1311/01 and LPC1313/01
only).
PIO3_4 18
[3]
no I/O I; PU PIO3_4 — General purpose digital input/output pin (LPC1313 only).
PIO3_5 21
[3]
no I/O I; PU PIO3_5 — General purpose digital input/output pin (LPC1313 only).
USB_DM 19
[6]
no I/O F USB_DM — USB bidirectional D line (LPC1343 only).
USB_DP 20
[6]
no I/O F USB_DP — USB bidirectional D+ line (LPC1343 only).
V
DD
8;
44
- I - 3.3 V supply voltage to the internal regulator, the external rail, and
the ADC. Also used as the ADC reference voltage.
XTALIN 6
[7]
- I - Input to the oscillator circuit and internal clock generator circuits.
Input voltage must not exceed 1.8 V.
XTALOUT 7
[7]
- O - Output from the oscillator amplifier.
V
SS
5;
41
- I - Ground.
Table 144. LPC1313/42/43 LQFP48 pin description table
…continued
Symbol Pin Start
logic
input
Type Reset
state
[1]
Description

NXP Semiconductors LPC1311 Specifications

General

Brand	NXP Semiconductors
Model	LPC1311
Category	Controller
Language	English