UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 225 of 368
NXP Semiconductors
UM10375
Chapter 13: LPC13xx I2C-bus controller
In Figure 34 to Figure 38, circles are used to indicate when the serial interrupt flag is set.
The numbers in the circles show the status code held in the I2STAT register. At these
points, a service routine must be executed to continue or complete the serial transfer.
These service routines are not critical since the serial transfer is suspended until the serial
interrupt flag is cleared by software.
When a serial interrupt routine is entered, the status code in I2STAT is used to branch to
the appropriate service routine. For each status code, the required software action and
details of the following serial transfer are given in tables from Table 235
to Table 239.
13.11.1 Master Transmitter mode
In the master transmitter mode, a number of data bytes are transmitted to a slave receiver
(see Figure 34
). Before the master transmitter mode can be entered, I2CON must be
initialized as follows:
The I
2
C rate must also be configured in the I2SCLL and I2SCLH registers. I2EN must be
set to logic 1 to enable the I
2
C block. If the AA bit is reset, the I
2
C block will not
acknowledge its own slave address or the General Call address in the event of another
device becoming master of the bus. In other words, if AA is reset, the I
2
C interface cannot
enter a slave mode. STA, STO, and SI must be reset.
Table 231. Abbreviations used to describe an I
2
C operation
Abbreviation Explanation
S START Condition
SLA 7-bit slave address
R Read bit (HIGH level at SDA)
W Write bit (LOW level at SDA)
A Acknowledge bit (LOW level at SDA)
A
Not acknowledge bit (HIGH level at SDA)
Data 8-bit data byte
P STOP condition
Table 232. I2CONSET used to initialize Master Transmitter mode
Bit 7 6 5 4 3 2 1 0
Symbol - I2EN STA STO SI AA - -
Value- 1000x- -
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