UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 238 of 368
NXP Semiconductors
UM10375
Chapter 13: LPC13xx I2C-bus controller
13.11.5 Miscellaneous states
There are two I2STAT codes that do not correspond to a defined I
2
C hardware state (see
Table 239
). These are discussed below.
13.11.5.1 I2STAT = 0xF8
This status code indicates that no relevant information is available because the serial
interrupt flag, SI, is not yet set. This occurs between other states and when the I
2
C block
is not involved in a serial transfer.
13.11.5.2 I2STAT = 0x00
This status code indicates that a bus error has occurred during an I
2
C serial transfer. A
bus error is caused when a START or STOP condition occurs at an illegal position in the
format frame. Examples of such illegal positions are during the serial transfer of an
address byte, a data byte, or an acknowledge bit. A bus error may also be caused when
external interference disturbs the internal I
2
C block signals. When a bus error occurs, SI is
set. To recover from a bus error, the STO flag must be set and SI must be cleared. This
Fig 37. Format and states in the Slave Transmitter mode
DATA
A
ARSLAS
P OR SA
A
B0H
A8H C0H
C8H
last data byte
transmitted. Switched
to Not Addressed
Slave (AA bit in
I2CON = “0”)
arbitration lost as
Master and
addressed as Slave
reception of the own
Slave address and
one or more Data
bytes all are
acknowledged
from Master to Slave
from Slave to Master
any number of data bytes and their associated
Acknowledge bits
n
this number (contained in I2STA) corresponds to a defined state of
the I
2
C bus
ADATA
B8H
ALL ONES
ADATA
P OR S
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