UM10375 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
User manual Rev. 3 — 14 June 2011 89 of 368
NXP Semiconductors
UM10375
Chapter 7: LPC13xx I/O configuration
IOCON_R_PIO1_0 R/W 0x078 I/O configuration for pin R/PIO1_0/AD1/
CT32B1_CAP0
0xD0
IOCON_R_PIO1_1 R/W 0x07C I/O configuration for pin R/PIO1_1/AD2/CT32B1_MAT0 0xD0
IOCON_R_PIO1_2 R/W 0x080 I/O configuration for pin R/PIO1_2/AD3/
CT32B1_MAT1
0xD0
IOCON_PIO3_0 R/W 0x084 I/O configuration for pin PIO3_0/DTR
0xD0
IOCON_PIO3_1 R/W 0x088 I/O configuration for pin PIO3_1/DSR
0xD0
IOCON_PIO2_3 R/W 0x08C I/O configuration for pin PIO2_3/RI
/MOSI1 0xD0
IOCON_SWDIO_PIO1_3 R/W 0x090 I/O configuration for pin SWDIO/PIO1_3/AD4/
CT32B1_MAT2
0xD0
IOCON_PIO1_4 R/W 0x094 I/O configuration for pin PIO1_4/AD5/CT32B1_MAT3 0xD0
IOCON_PIO1_11 R/W 0x098 I/O configuration for pin PIO1_11/AD7 0xD0
IOCON_PIO3_2 R/W 0x09C I/O configuration for pin PIO3_2/DCD
0xD0
IOCON_PIO1_5 R/W 0x0A0 I/O configuration for pin PIO1_5/RTS
/CT32B0_CAP0 0xD0
IOCON_PIO1_6 R/W 0x0A4 I/O configuration for pin PIO1_6/RXD/CT32B0_MAT0 0xD0
IOCON_PIO1_7 R/W 0x0A8 I/O configuration for pin PIO1_7/TXD/CT32B0_MAT1 0xD0
IOCON_PIO3_3 R/W 0x0AC I/O configuration for pin PIO3_3/RI
0xD0
IOCON_SCK0_LOC R/W 0x0B0 SCK0 pin location register 0
IOCON_DSR_LOC R/W 0x0B4 DSR
pin location select register 0
IOCON_DCD_LOC R/W 0x0B8 DCD
pin location select register 0
IOCON_RI_LOC R/W 0x0BC RI
pin location register 0
Table 95. Register overview: I/O configuration block (base address 0x4004 4000)
…continued
Name Access Address
offset
Description Reset
value
Table 96. I/O configuration registers ordered by port number
Port pin Pin name LQFP48 HVQFN33 Reference
PIO0_0 IOCON_RESET_PIO0_0 yes yes Table 99
PIO0_1 IOCON_PIO0_1 yes yes Table 100
PIO0_2 IOCON_PIO0_2 yes yes Table 102
PIO0_3 IOCON_PIO0_3 yes yes Table 106
PIO0_4 IOCON_PIO0_4 yes yes Table 107
PIO0_5 IOCON_PIO0_5 yes yes Table 108
PIO0_6 IOCON_PIO0_6 yes yes Table 114
PIO0_7 IOCON_PIO0_7 yes yes Table 115
PIO0_8 IOCON_PIO0_8 yes yes Table 119
PIO0_9 IOCON_PIO0_9 yes yes Table 120
PIO0_10 IOCON_SWCLK_PIO0_10 yes yes Table 121
PIO0_11 IOCON_R_PIO0_11 yes yes Table 124
PIO1_0 IOCON_R_PIO1_0 yes yes Table 125
PIO1_1 IOCON_R_PIO1_1 yes yes Table 126
PIO1_2 IOCON_R_PIO1_2 yes yes Table 127
PIO1_3 IOCON_SWDIO_PIO1_3 yes yes Table 131
PIO1_4 IOCON_PIO1_4 yes yes Table 132
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