AMCC Proprietary 226
Revision 1.02 - September 10, 2007
PPC405 Processor
lbzu
Load Byte and Zero with Update
Preliminary User’s Manual
lbzu
Load Byte and Zero with Update
EA ← (RA|0) + EXTS(D)
(RA)
← EA
(RT)
←
24
0|| MS(EA,1)
An effective address (EA) is formed by adding a displacement to a base address. The displacement is obtained by
sign-extending the 16-bit D field to 32 bits. The base address is 0 if the RA field is 0 and is the contents of register
RA otherwise. The EA is placed into register RA.
The byte at the EA is extended to 32 bits by concatenating 24 0-bits to its left. The result is placed into register RT.
Registers Altered
•RA
•RT
Invalid Instruction Forms
•RA=RT
•RA=0
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
lbzu RT, D(RA)
35 RT RA D
0 6 11 16 31
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