AMCC Proprietary 245
Revision 1.02 - September 10, 2007
PPC405 Processor
lwz
Load Word and Zero
Preliminary User’s Manual
lwz
Load Word and Zero
EA ← (RA|0) + EXTS(D)
(RT)
← MS(EA,4)
An effective address (EA) is formed by adding a displacement to a base address. The displacement is obtained by
sign-extending the 16-bit D field to 32 bits. The base address is 0 if the RA field is 0 and is the contents of register
RA otherwise.
The word at the EA is placed into register RT.
Registers Altered
•RT
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
lwz RT, D(RA)
32 RT RA D
0 6 11 16 31
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