AMCC PPC405 - Page 304

AMCC Proprietary 304
Revision 1.02 - September 10, 2007
PPC405 Processor
slw
Shift Left Word
Preliminary User’s Manual
slw
Shift Left Word
n ← (RB)
27:31
r ← ROTL((RS), n)
if (RB)
26
= 0 then
m
← MASK(0, 31 – n)
else
m
←
32
0
(RA)
← r ∧ m
The contents of register RS are shifted left by the number of bits specified by the contents of register RB
27:31
. Bits
shifted left out of the most significant bit are lost, and 0-bits fill vacated bit positions on the right. The result is
placed into register RA.
If RB
26
= 1, register RA is set to zero.
Registers Altered
•RA
• CR[CR0]
LT, GT, EQ, SO
if Rc contains 1
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
slw RA, RS, RB Rc=0
slw. RA, RS, RB Rc=1
31 RS RA RB 24 Rc
0 6 11 16 21 31