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Figure 3: Data Flow Through the T640 Router

1. Packets arrive at an incoming PIC interface.

2. The PIC passes the packets to the FPC, where the Layer 2/Layer 3 Packet Processing

ASIC performs Layer 2 and Layer 3 parsing and divides the packets into 64-byte cells.

3. The Switch Interface ASIC extracts the route lookup key, places it in a notification and

passes the notification to the T-series Internet Processor. The Switch Interface ASIC

also passes the data cells to the Queuing and Memory Interface ASICs for buffering.

4. The Queuing and Memory Interface ASICs pass the data cells to memory for buffering.

5. The T-series Internet Processor performs the route lookup and forwards the notification

to the Queuing and Memory Interface ASIC.

6. The Queuing and Memory Interface ASIC sends the notification to the Switch Interface

ASIC facing the switch fabric, unless the destination is on the same Packet Forwarding

Engine. In this case, the notification is sent back to the Switch Interface ASIC facing

the outgoing ports, and the packets are sent to the outgoing port without passing

through the switch fabric (see Step 13).

T640 Core Router Hardware Guide

Juniper T640 Hardware Guide

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