Remote control - status reporting system
R&S
®
RTM3000
824User Manual 1335.9090.02 ─ 09
B.3.4.3 STATus:QUEStionable:ADCState register
This register contains all information about overflow of the ADC.
The bit is set if the assigned channel signal is clipped on the upper or lower edge of the
screen. In this case, the signal does not fit in the range of the ADC and overflow
occurs.
Table B-7: Bits in the STATus:QUEStionable:ADCState register
Bit No. Meaning
0 CHANnel1, clipping on the upper limit
1 CHANnel1, clipping on the lower limit
2 CHANnel2, clipping on the upper limit
3 CHANnel2, clipping on the lower limit
4 CHANnel3, clipping on the upper limit
5 CHANnel3, clipping on the lower limit
6 CHANnel4, clipping on the upper limit
7 CHANnel4, clipping on the lower limit
B.3.4.4 STATus:QUEStionable:LIMit register
This register contains information about the observance of the limits of measurements.
This bit is set if the limits of the assigned measurement are violated.
Table B-8: Bits in the STATus:QUEStionable:LIMit register
Bit No. Meaning
0
MEAS1
1
MEAS2
2
MEAS3
3
MEAS4
4
MEAS5
5
MEAS6
6
MEAS7
7
MEAS8
B.3.4.5 STATus:QUEStionable:MASK register
This register contains information about the violation of masks. This bit is set if the
assigned mask is violated.
Contents of the status registers
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