N3: Software cams, position switching cycles - only 840D sl
8.3 Output of cam signals
Extended Functions
548 Function Manual, 03/2013, 6FC5397-1BP40-3BA1
Hardware assignment
The assignment to the hardware bytes used is made for each eight cam pairs in the following
general machine data:
• MD10470 SW_CAM_ASSIGN_FASTOUT_1
Hardware assignment for output of cams
1 - 8 to NCK I/Os
• MD10471 SW_CAM_ASSIGN_FASTOUT_2
Hardware assignment for output of cams
9 - 16 to NCK I/Os
• MD10472 SW_CAM_ASSIGN_FASTOUT_3
Hardware assignment for output of cams
17 - 24 to NCK I/Os
• MD10473 SW_CAM_ASSIGN_FASTOUT_4
Hardware assignment for output of cams
25 - 32 to NCK I/Os
Note
It is possible to define one HW byte for the output of eight minus cam signals and one HW
byte for the output of eight plus cam signals in each machine data.
In addition, the output of the cam signals can be inverted with the two machine data.
If the 2nd byte is not specified (= "0"), then the 8 cams are output as a logic operation of the
minus and plus cam signals via the 1st HW byte using the 1st inversion screen form.
Status query in the part program
The status of the HW outputs can be read in the part program with main run variable
$A_OUT[n] (n = no. of output bit).
Switching accuracy
Signals are output to the NCK I/Os or onboard outputs in the position control cycle.
As a result of the time scale of the position control cycle, the switching accuracy of the cam
signals is limited as a function of the velocity.
The following applies:
Delta pos = V
act
* position control cycle
Delta pos = switching accuracy (depending on position control cycle) with:
V
act
= Current axis velocity
Example:
V
act
= 20 m/min, PC cycle = 4 ms Delta pos = 1.33 mm
V
act
= 2000 rpm, PC cycle = 2 ms Delta pos = 24 degrees
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