Table 2-4: System Time Message field descriptions
95
Table 2-5: DCLS Output Options
136
Table 2-6: Multi I/O Input and Output Options
137
Table 2-7: Signature control output-presence states
162
Table 3-1: Reference priority titles
184
Table 3-2: Receiver dynamics, ~modes, ~ dynamics, ~ types
213
Table 3-3: Estimated Phase Drifts
227
Table 3-4: Typical Holdover lengths in seconds
227
Table 3-5: TFOM to ETE conversion
232
Table 4-1: Default and recommended configurations
323
Table 5-1: Troubleshooting using the Web UI Status indications
328
Table 5-2: Troubleshooting outputs not being present
330
Table 5-3: Parts list, Ancillary Kit [1204-0000-0700]
341
Table 5-4: Model 1204-03 1PPS/Freq Input: Connector pin assignment
364
Table 5-5: Model 1204-30 terminal block pin assignments
376
Table 5-6: DB-9 pin-out
383
Table 5-7: RJ-12 pin assignments
384
Table 5-8: CTCSS exact (1/3 Hz) tones
388
Table 5-9: CTCSS exact (1/10 Hz) tones
389
Table 5-10: Data Clock Signals
389
Table 5-11: 1PPS Duty Cycle
389
Table 5-12: 1204-0A option card pin assignments
392
Table 5-13: 1204-4C option card pin assignments
394
Table 5-14: 1204-22 terminal block pin-out
399
Table 5-15: Accepted IRIG reference formats
409
Table 5-16: Models 1204-11, -25: DB-25 pin-out
420
Table 5-17: 1204-1D, 1204-24 option cards: DB-25 pin-outs
427
Table 5-18: 1204-1B terminal block pin-out
436
Table 5-19: Pin-out, OUTPUT connector "J1"
448
Table 5-20: Pin-out, INPUT connector "J2"
448
Table 5-21: Pin-out, RS-485 terminal block connector J1
449
Table 5-22: Clock class definitions
471
Table 5-23: NENA module specifications
492
Table 5-24: ASCII RS-232 Output connector pin assignments
495
Table 5-25: Relay/RS-485 outputs pin assignments
496
Table 5-26: Output connector DB-9: pin-out
506
Table 5-27: Quality indicators
528
Table 5-28: Available IRIG output signals
547
Table 5-29: IRIG B control function field
553
Table 5-30: FAA Time Error Indicators
556
Table 5-31: IRIG E control function field
560
SecureSync 2400 User Manual 565
APPENDIX