Rohde & Schwarz RTP044 - Page 2130

Remote control commands
R&S
®
RTP
2130User Manual 1337.9952.02 ─ 12
BUS<m>:PCIE:DFE:ENBLe <EnableDFE>
Enables the use of the decision feedback equalization for PCIe.
Suffix:
<m>
.
1..4
Parameters:
<EnableDFE> ON | OFF
*RST: ON
BUS<m>:PCIE:DFE:TCONt <CIRLength>
Sets a number of taps for the decision feedback filter.
Suffix:
<m>
.
1..4
Parameters:
<CIRLength> Range: 1 to 20
Increment: 1
*RST: 5
22.17.23.4 Trigger
The trigger suffix <m> is always 1 and can be omitted. It selects the trigger event: Only
the A-trigger is available for triggering on serial buses.
To trigger on a serial bus, make sure that:
●
TRIGger<m>:SOURce[:SELect] is set to SBUS.
●
The sources of the serial bus are channel signals: use BUS<m>:...:SOURce
commands.
●
Decoding is enabled: BUS<m>[:STATe] is set to ON.
TRIGger<m>:PCIE:TRGLevel....................................................................................... 2131
TRIGger<m>:PCIE:DLLP:FCTL:CRET........................................................................... 2131
TRIGger<m>:PCIE:DLLP:FCTL:VCID............................................................................ 2132
TRIGger<m>:PCIE:DLLP:MULT:AUTH...........................................................................2132
TRIGger<m>:PCIE:DLLP:MULT:CRET...........................................................................2132
TRIGger<m>:PCIE:DLLP:MULT:DVPT........................................................................... 2132
TRIGger<m>:PCIE:DLLP:MULT:HABS...........................................................................2132
TRIGger<m>:PCIE:DLLP:MULT:MIXT............................................................................ 2132
TRIGger<m>:PCIE:DLLP:MULT:PHAS...........................................................................2133
TRIGger<m>:PCIE:DLLP:MULT:RESA...........................................................................2133
TRIGger<m>:PCIE:DLLP:MULT:TLPT............................................................................2133
TRIGger<m>:PCIE:DLLP:MULT:TYPE........................................................................... 2133
TRIGger<m>:PCIE:DLLP:MULT:VHFC...........................................................................2133
TRIGger<m>:PCIE:DLLP:MULT:VHGR...........................................................................2134
TRIGger<m>:PCIE:DLLP:MULT:VLNR........................................................................... 2134
TRIGger<m>:PCIE:DLLP:POWM...................................................................................2134
TRIGger<m>:PCIE:DLLP:SEQ...................................................................................... 2134
Protocols