Protocol analysis
R&S
®
RTP
879User Manual 1337.9952.02 ─ 12
Decode layer
Selects the decode layer.
Decoding is performed in several steps, and the end results are presented in the
decode table. The decode layer selects an interim step for which the decoding result is
shown in the honeycomb display.
Available are:
●
"Off"
●
"Edges"
●
"Binary"
Filter Idle
Enables the filtering of idle packets.
Remote command:
BUS<m>:PCIE:FIDLe on page 2124
Show multiple lanes
Displays the result in multiple lanes.
Remote command:
BUS<m>:PCIE:SMLanes on page 2125
13.22.2.3 Configuring PCIe Gen 1/2
For configuration, you assign the line to the input channel, set the threshold, the
bitrate, and the sync symbol.
For details on configuration settings, see Chapter 13.22.2.1, "PCIe configuration set-
tings", on page 876.
1. Press the [Protocol] key on the front panel.
2. Select the tab of the bus you want to set up.
3. In the "Setup" tab, select the protocol: "PCIe".
4. Tap the "Generation" button and select the PCIe protocol.
5. Tap the "Link" button and chose the link width.
6. Select the source for of the signal for each lane.
7. Check the threshold settings for each lane. Adjust the values if necessary.
13.22.3 PCIe digital signal processing (DSP) settings
13.22.3.1 PCIe Gen 1/2 CDR configuration settings
The process of clock data recovery (CDR) generates a reference clock from a high-
speed serial data stream that is sent without a dedicated clock signal. The generated
PCIe (option R&S
RTP-K72/K73)
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