USB on-the-go high-speed (OTG_HS) RM0033
1210/1381 RM0033 Rev 9
• Reading the receive FIFO
The application must ignore all packet statuses other than IN data packet (bx0010).
Figure 380. Receive FIFO read task
• Bulk and control OUT/SETUP transactions
A typical bulk or control OUT/SETUP pipelined transaction-level operation is shown in
Figure 381. See channel 1 (ch_1). Two bulk OUT packets are transmitted. A control
SETUP transaction operates in the same way but has only one packet. The
assumptions are:
– The application is attempting to send two maximum-packet-size packets (transfer
size = 1, 024 bytes).
– The nonperiodic transmit FIFO can hold two packets (128 bytes for FS).
– The nonperiodic request queue depth = 4.
• Normal bulk and control OUT/SETUP operations
The sequence of operations for channel 1 is as follows:
a) Initialize channel 1
b) Write the first packet for channel 1
MSv65220V1
RXFLVL
interrupt?
Read the received
packet from the
Receive FIFO
Read
OTG_HS_GRXSTSP
PKTSTS
0b0010?
Unmask RXFLVL
interrupt
BCNT > 0?
Mask RXFLVL
interrupt
Unmask RXFLVL
interrupt
Start
No
No
No
Yes
Yes
Yes
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