EasyManuals Logo

ST STM32F207 series User Manual

ST STM32F207 series
1381 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1284 background imageLoading...
Page #1284 background image
Flexible static memory controller (FSMC) RM0033
1284/1381 RM0033 Rev 9
Muxed mode - multiplexed asynchronous access to NOR Flash memory
Figure 410. Multiplexed read accesses
Figure 411. Multiplexed write accesses
The difference with mode D is the drive of the lower address byte(s) on the databus.
A[25:16]
NOE
ADDSET (DATAST + 1)
Memory transaction
NEx
AD[15:0]
HCLK cycles HCLK cycles
NWE
NADV
data driven by FSMC
ai15569
1HCLK
ADDHLD
HCLK cycles
Lower address

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32F207 series and is the answer not in the manual?

ST STM32F207 series Specifications

General IconGeneral
BrandST
ModelSTM32F207 series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals