ST STM32F207 series User Manual

RM0033 Rev 9 565/1381
RM0033 Hash processor (HASH)
569
HASH_HR4
Address offset: 0x1C
Note: When starting a digest computation for a new bit stream (by writing the INIT bit to 1), these
registers assume their reset values.
21.4.5 HASH interrupt enable register (HASH_IMR)
Address offset: 0x20
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
H3
rrrrrrrrrrrrrrrr
1514131211109876543210
H3
rrrrrrrrrrrrrrrr
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
H4
rrrrrrrrrrrrrrrr
1514131211109876543210
H4
rrrrrrrrrrrrrrrr
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
1514131211109876543210
Reserved
DCIE DINIE
rw rw
Bits 31:2 Reserved, forced by hardware to 0.
Bit 1 DCIE: Digest calculation completion interrupt enable
0: Digest calculation completion interrupt disabled
1: Digest calculation completion interrupt enabled.
Bit 0 DINIE: Data input interrupt enable
0: Data input interrupt disabled
1: Data input interrupt enabled

ST STM32F207 series Specifications

General

Brand	ST
Model	STM32F207 series
Category	Microcontrollers
Language	English