RM0033 Rev 9 413/1381
RM0033 General-purpose timers (TIM2 to TIM5)
436
Figure 158. Triggering timer 1 and 2 with timer 1 TI1 input
14.3.16 Debug mode
When the microcontroller enters debug mode (Cortex
®
-M3 core - halted), the TIMx counter
either continues to work normally or stops, depending on DBG_TIMx_STOP configuration
bit in DBGMCU module. For more details, refer to Section 32.16.2: Debug support for
timers, watchdog, bxCAN and I
2
C.
MS37392V1
CK_INT
TIMER2-CNT
TIMER1-CEN=CNT_EN
TIMER2-TIF
01
TIMER1-CNT
02 03 04 05 06 07 08 0900
TIMER2-CEN=CNT_EN
TIMER1-TIF
TIMER1-CK_PSC
TIMER1-TI1
TIMER2-CK_PSC
01 02 03 04 05 06 07 08 0900
To Next Page
Loading...
Need help?
General
