RM0033 Rev 9 51/1381
RM0033 Memory and bus architecture
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2.3 Memory map
See the datasheet corresponding to your device for a comprehensive diagram of the
memory map. Table 1 gives the boundary addresses of the peripherals available in all
STM32F20x and STM32F21x devices.
Table 1. STM32F20x and STM32F21x register boundary addresses
Boundary address Peripheral Bus Register map
0xA000 0000 - 0xA000 0FFF FSMC control register AHB3 Section 31.6.9: FSMC register map on page 1317
0x5006 0800 - 0X5006 0BFF RNG
AHB2
Section 20.4.4: RNG register map on page 548
0x5006 0400 - 0X5006 07FF HASH Section 21.4.8: HASH register map on page 568
0x5006 0000 - 0X5006 03FF CRYP Section 19.6.11: CRYP register map on page 542
0x5005 0000 - 0X5005 03FF DCMI Section 12.8.12: DCMI register map on page 301
0x5000 0000 - 0X5003 FFFF USB OTG FS
Section 29.16.6: OTG_FS register map on
page 1043
0x4004 0000 - 0x4007 FFFF USB OTG HS
AHB1
Section 30.12.6: OTG_HS register map on
page 1189
0x4002 9000 - 0x4002 93FF
ETHERNET MAC
Section 28.8.5: Ethernet register maps on
page 953
0x4002 8C00 - 0x4002 8FFF
0x4002 8800 - 0x4002 8BFF
0x4002 8400 - 0x4002 87FF
0x4002 8000 - 0x4002 83FF
0x4002 6400 - 0x4002 67FF DMA2
Section 9.5.11: DMA register map on page 208
0x4002 6000 - 0x4002 63FF DMA1
0x4002 4000 - 0x4002 4FFF BKPSRAM
0x4002 3C00 - 0x4002 3FFF
Flash interface
register
See Flash programming manual
0x4002 3800 - 0x4002 3BFF RCC Section 5.3.24: RCC register map on page 135
0x4002 3000 - 0x4002 33FF CRC Section 3.4.4: CRC register map on page 63
0x4002 2000 - 0x4002 23FF GPIOI
Section 6.4.11: GPIO register map on page 157
0x4002 1C00 - 0x4002 1FFF GPIOH
0x4002 1800 - 0x4002 1BFF GPIOG
0x4002 1400 - 0x4002 17FF GPIOF
0x4002 1000 - 0x4002 13FF GPIOE
0X4002 0C00 - 0x4002 0FFF GPIOD
0x4002 0800 - 0x4002 0BFF GPIOC
0x4002 0400 - 0x4002 07FF GPIOB
0x4002 0000 - 0x4002 03FF GPIOA