Controller area network (bxCAN) RM0033
830/1381 RM0033 Rev 9
27.9.4 CAN filter registers
CAN filter master register (CAN_FMR)
Address offset: 0x200
Reset value: 0x2A1C 0E01
All bits of this register are set and cleared by software.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
1514131211109876543210
Reserved
CAN2SB[5:0]
Reserved
FINIT
rw rw rw rw rw rw rw
Bits 31:14 Reserved, must be kept at reset value.
Bits 13:8 CAN2SB[5:0]
: CAN2 start bank
These bits are set and cleared by software. They define the start bank for the CAN2
interface (Slave) in the range 0 to 27.
Note: When CAN2SB[5:0] = 28d, all the filters to CAN1 can be used.
When CAN2SB[5:0] is set to 0, no filters are assigned to CAN1.
Bits 7:1 Reserved, must be kept at reset value.
Bit 0 FINIT
: Filter init mode
Initialization mode for filter banks
0: Active filters mode.
1: Initialization mode for the filters.