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Digital camera interface (DCMI) RM0033

286/1381 RM0033 Rev 9

Continuous grab mode

In this mode (CM bit = ‘0’ in DCMI_CR), once the CAPTURE bit has been set in DCMI_CR,

the grabbing process starts on the next VSYNC or embedded frame start depending on the

mode. The process continues until the CAPTURE bit is cleared in DCMI_CR. Once the

CAPTURE bit has been cleared, the grabbing process continues until the end of the current

frame.

Figure 61. Frame capture waveforms in continuous grab mode

1. Here, the active state of DCMI_HSYNC and DCMI_VSYNC is 1.

2. DCMI_HSYNC and DCMI_VSYNC can change states at the same time.

In continuous grab mode, you can configure the FCRC bits in DCMI_CR to grab all pictures,

every second picture or one out of four pictures to decrease the frame capture rate.

Note: In the hardware synchronization mode (ESS = ‘0’ in DCMI_CR), the IT_VSYNC interrupt is

generated (if enabled) even when CAPTURE = ‘0’ in DCMI_CR so, to reduce the frame

capture rate even further, the IT_VSYNC interrupt can be used to count the number of

frames between 2 captures in conjunction with the Snapshot mode. This is not allowed by

embedded data synchronization mode.

12.5.5 Crop feature

With the crop feature, the camera interface can select a rectangular window from the

received image. The start (upper left corner) coordinates and size (horizontal dimension in

number of pixel clocks and vertical dimension in number of lines) are specified using two 32-

bit registers (DCMI_CWSTRT and DCMI_CWSIZE). The size of the window is specified in

number of pixel clocks (horizontal dimension) and in number of lines (vertical dimension).

DCMI_HSYNC

DCMI_VSYNC

Frame 1 captured Frame 2 captured

ai15833b

ST STM32F207 series User Manual

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