ST STM32F207 series - Figure 246. CTS Flow Control

Universal synchronous asynchronous receiver transmitter (USART) RM0033
668/1381 RM0033 Rev 9
Figure 246. CTS flow control
Note: Special behavior of break frames: when the CTS flow is enabled, the transmitter does not
check the CTS input state to send a break.
MSv31167V2
Start
bit
Stop
bit
TX
TDR
CTS
Data 1
Data 2
Stop
bit
Idle
Start
bit
Data 2 Data 3
Data 3
empty empty
CTS
CTS
Transmit data register
Writing data 3 in TDR
Transmission of Data 3 is
delayed until CTS = 0