RM0033 Rev 9 579/1381
RM0033 Real-time clock (RTC)
597
mapped. When a timestamp event occurs, the timestamp flag bit (TSF) in RTC_ISR register
is set.
By setting the TSIE bit in the RTC_CR register, an interrupt is generated when a timestamp
event occurs.
If a new timestamp event is detected while the timestamp flag (TSF) is already set, the
timestamp overflow flag (TSOVF) flag is set and the timestamp registers (RTC_TSTR and
RTC_TSDR) maintain the results of the previous event.
Note: TSF is set 2 ck_apre cycles after the timestamp event occurs due to synchronization
process.
There is no delay in the setting of TSOVF. This means that if two timestamp events are
close together, TSOVF can be seen as '1' while TSF is still '0'. As a consequence, it is
recommended to poll TSOVF only after TSF has been set.
Caution: If a timestamp event occurs immediately after the TSF bit is supposed to be cleared, then
both TSF and TSOVF bits are set. To avoid masking a timestamp event occurring at the
same moment, the application must not write ‘0’ into TSF bit unless it has already read it to
‘1’.
TIMESTAMP alternate function
The TIMESTAMP alternate function can be mapped to either RTC_AF1 or RTC_AF2
depending on the value of the TSINSEL bit in the RTC_TAFCR register (see
Section 22.6.13 on page 595). Mapping the timestamp event on RTC_AF2 is not allowed if
RTC_AF1 is used as TAMPER in filtered mode (TAMPFLT set to a non-zero value).
22.3.11 Tamper detection
Two tamper detection inputs are available They can be configured either for edge detection,
or for level detection with filtering.
RTC backup registers
The backup registers (RTC_BKPxR) are twenty 32-bit registers for storing 80 bytes of user
application data. They are implemented in the backup domain that remains powered-on by
V
BAT
when the V
DD
power is switched off. They are not reset by system reset or when the
device wakes up from Standby mode. They are reset by a backup domain reset.
The backup registers are reset when a tamper detection event occurs (see Section 22.6.14:
RTC backup registers (RTC_BKPxR) and Tamper detection initialization on page 579.
Tamper detection initialization
The tamper detection input is associated with the TAMP1F flag in the RTC_ISR register. The
input can be enabled by setting the TAMP1E bit to 1 in the RTC_TAFCR register.
A tamper detection event resets all backup registers (RTC_BKPxR).
By setting the TAMPIE bit in the RTC_TAFCR register, an interrupt is generated when a
tamper detection event occurs.
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