ST STM32F207 series User Manual

RM0033 Rev 9 1319/1381
RM0033 Debug support (DBG)
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32 Debug support (DBG)
This section applies to the whole STM32F20x and STM32F21x family, unless otherwise
specified.
32.1 Overview
The STM32F20x and STM32F21x are built around a Cortex
®
-M3 core which contains
hardware extensions for advanced debugging features. The debug extensions allow the
core to be stopped either on a given instruction fetch (breakpoint) or data access
(watchpoint). When stopped, the core’s internal state and the system’s external state may
be examined. Once examination is complete, the core and the system may be restored and
program execution resumed.
The debug features are used by the debugger host when connecting to and debugging the
STM32F20x and STM32F21x MCUs.
Two interfaces for debug are available:
• Serial wire
• JTAG debug port
Figure 419. Block diagram of STM32 MCU and Cortex
®
-M3-level debug support
e
s
t
r
i
c
t
e
d
D
i
Cortex-M3
core
SWJ-DP
AHB-AP
Bridge
NVIC
DWT
FPB
ITM
TPIU
DCode
interface
System
interface
Internal private
peripheral bus (PPB)
External private
peripheral bus (PPB)
Bus matrix
Data
Tra c e po r t
DBGMCU
STM32F20x/STM32F21x debug support
Cortex-M3 debug support
JTMS/
JTDI
JTDO/
NJTRST
JTCK/
SWDIO
SWCLK
TRACESWO
TRACESWO
TRACECK
TRACED[3:0]
ai17103

ST STM32F207 series Specifications

General

Brand	ST
Model	STM32F207 series
Category	Microcontrollers
Language	English