EasyManuals Logo

ST STM32F207 series User Manual

ST STM32F207 series
1381 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1249 background imageLoading...
Page #1249 background image
RM0033 Rev 9 1249/1381
RM0033 USB on-the-go high-speed (OTG_HS)
1260
1. The application must set the transfer size and packet count fields in the endpoint-
specific registers and enable the endpoint to transmit the data.
2. The application must also write the required data to the transmit FIFO for the endpoint.
3. Every time a packet is written into the transmit FIFO by the application, the transfer size
for that endpoint is decremented by the packet size. The data is fetched from the
memory by the application, until the transfer size for the endpoint becomes 0. After
writing the data into the FIFO, the “number of packets in FIFO” count is incremented
(this is a 3-bit count, internally maintained by the core for each IN endpoint transmit
FIFO. The maximum number of packets maintained by the core at any time in an IN
endpoint FIFO is eight). For zero-length packets, a separate flag is set for each FIFO,
without any data in the FIFO.
4. Once the data are written to the transmit FIFO, the core reads them out upon receiving
an IN token. For every nonisochronous IN data packet transmitted with an ACK
handshake, the packet count for the endpoint is decremented by one, until the packet
count is zero. The packet count is not decremented on a timeout.
5. For zero length packets (indicated by an internal zero length flag), the core sends out a
zero-length packet for the IN token and decrements the packet count field.
6. If there are no data in the FIFO for a received IN token and the packet count field for
that endpoint is zero, the core generates an “IN token received when TxFIFO is empty”
(ITTXFE) Interrupt for the endpoint, provided that the endpoint NAK bit is not set. The
core responds with a NAK handshake for nonisochronous endpoints on the USB.
7. The core internally rewinds the FIFO pointers and no timeout interrupt is generated.
8. When the transfer size is 0 and the packet count is 0, the transfer complete (XFRC)
interrupt for the endpoint is generated and the endpoint enable is cleared.
Application programming sequence:
1. Program the OTG_HS_DIEPTSIZx register with the transfer size and corresponding
packet count.
2. Program the OTG_HS_DIEPCTLx register with the endpoint characteristics and set the
CNAK and EPENA (Endpoint Enable) bits.
3. When transmitting nonzero length data packet, the application must poll the
OTG_HS_DTXFSTSx register (where x is the FIFO number associated with that
endpoint) to determine whether there is enough space in the data FIFO. The
application can optionally use TXFE (in OTG_HS_DIEPINTx) before writing the data.
Generic periodic IN data transfers
This section describes a typical periodic IN data transfer.
Application requirements:
1. Application requirements 1, 2, 3, and 4 of Generic non-periodic IN data transfers on
page 1248also apply to periodic IN data transfers, except for a slight modification of
requirement 2.
The application can only transmit multiples of maximum-packet-size data packets
or multiples of maximum-packet-size packets, plus a short packet at the end. To

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32F207 series and is the answer not in the manual?

ST STM32F207 series Specifications

General IconGeneral
BrandST
ModelSTM32F207 series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals